Inner spacer formation for nanosheet field-effect transistors with tall suspensions
US10014390B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 2017 |
| Grant date | Jul 3, 2018 |
| Priority date | — |
| Expiry date | Oct 10, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6736
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
Structures for a nanosheet field-effect transistor and methods for forming a structure for a nanosheet field-effect transistor. A body feature is formed that includes a first nanosheet channel layer, a second nanosheet channel layer, and first, second, and third sacrificial layers that are vertically arranged between the first and second nanosheet channel layers. The first, second, and third sacrificial layers are laterally recessed relative to the first and second nanosheet channel layers to form a cavity indented into a sidewall of the first body feature. The second sacrificial layer is laterally recessed to a lesser extent than the first sacrificial layer or the third sacrificial layer such that an end of the second sacrificial layer projects into the cavity between the first and third sacrificial layers. A dielectric spacer is formed in the first and second portions of cavity between the first and second nanosheet channel layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.