Patent · US Active

Integrated circuit substrate and method for manufacturing the same

US10020264B2 · kind B2 · utility

0Cited by

9References

17Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Michael Roesner · Villach, AT
Gudrun Stranzl · Eisenlohrsweg, AT
Manfred Engelhardt · Feldkirchen-Westerham, DE
Martin Zgaga · Rosegg, AT

Key dates

Filing date	Apr 28, 2015
Grant date	Jul 10, 2018
Priority date	—
Expiry date	Apr 28, 2035

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2223/54473
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

The description discloses a method for use in manufacturing integrated circuit chips. The method comprises providing a wafer having a plurality of integrated circuits each provided in an separate active areas, and, for each active area, outside the active area, providing a code pattern that is associated with the integrated circuit. A computer-readable medium is also disclosed. Further, a manufacturing apparatus configured to receive a wafer and to remove material from the wafer so as to provide a scribe line to the wafer formed as a trench for use in separation of the wafer into dies is also disclosed. The description also discloses a wafer, an integrated circuit chip die substrate originating from a wafer of origin and carrying an integrated circuit, and an integrated circuit chip.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.