System and method to emulate finite element model based prediction of in-plane distortions due to semiconductor wafer chucking
US10025894B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 3, 2016 |
| Grant date | Jul 17, 2018 |
| Priority date | — |
| Expiry date | Jun 3, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67288
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for prediction of in-plane distortions (IPD) due to wafer shape in semiconductor wafer chucking process is disclosed. A series of Zernike basis wafer shapes process to emulate the non-linear finite element (FE) contact mechanics model based IPD prediction is utilized in accordance with one embodiment of the present disclosure. The emulated FE model based prediction process is substantially more efficient and provides accuracy comparable to the FE model based IPD prediction that utilizes full-scale 3-D wafer and chuck geometry information and requires computation intensive simulations. Furthermore, an enhanced HOS IPD/OPD prediction process based on a series of Zernike basis wafer shape images is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.