Vertically stacked nanowire field effect transistors
US10043796B2 · kind B2 · utility
3Cited by
13References
33Claims
0Family size
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Key dates
| Filing date | Apr 12, 2016 |
| Grant date | Aug 7, 2018 |
| Priority date | — |
| Expiry date | Apr 12, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0149
Abstract
A device includes a substrate, a first nanowire field effect transistor (FET), and a second nanowire FET positioned between the substrate and the first nanowire FET. The device also includes a first nanowire electrically coupled to the first nanowire FET and to the second nanowire FET.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.