Semiconductor substrate and manufacturing method thereof
US10049976B2 · kind B2 · utility
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20Claims
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Assignee
Inventors
Key dates
| Filing date | Jan 26, 2016 |
| Grant date | Aug 14, 2018 |
| Priority date | — |
| Expiry date | Jan 26, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor substrate includes an insulating layer and a conductive circuit layer embedded at a surface of the insulating layer. The conductive circuit layer includes a first portion and a second portion. The first portion includes a bonding pad and one portion of a conductive trace, and the second portion includes another portion of the conductive trace. An upper surface of the first portion is not coplanar with an upper surface of the second portion. A semiconductor packaging structure includes the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.