Method of processing a semiconductor structure
US10056531B2 · kind B2 · utility
0Cited by
6References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 21, 2012 |
| Grant date | Aug 21, 2018 |
| Priority date | — |
| Expiry date | Feb 19, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/8511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method according to embodiments of the invention includes providing a wafer including a semiconductor structure grown on a growth substrate, the semiconductor structure comprising a III-nitride light emitting layer sandwiched between an n-type region and a p-type region. The wafer is bonded to a second substrate. The growth substrate is removed. After bonding the wafer to the second substrate, the wafer is processed into multiple light emitting devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.