Dynamic random access memory
US10068907B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | May 12, 2017 |
| Grant date | Sep 4, 2018 |
| Priority date | — |
| Expiry date | May 12, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/115
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A dynamic random access memory (DRAM) includes a substrate, two buried word lines and a bit line contact. The substrate includes a first active area, wherein the first active area extends along a first direction. The buried word lines are disposed in the substrate and across the first active area, wherein the buried word lines extend along a second direction. The bit line contact is disposed on the substrate and overlaps the first active area between the two buried word lines, wherein the bit line contact is enclosed by a first side, a second side, a third side and a fourth side, and the first side is parallel to the third side along a third direction while the second side is parallel to the fourth side along a fourth direction, wherein the third direction is parallel to the first direction and the fourth direction is parallel to the second direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.