Ming-Te Wei
25Patents
5h-index
35Co-inventors
69Inventor score
Filing activity: Aug 18, 1997 → Mar 8, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| USD430924S | Faucet handle | General | 46 | Expired |
| US5881754A | Valve device for faucet and spray gun | Emerging Cross-Sectional Technologies | 20 | Expired |
| USD427666S | Faucet body | General | 14 | Expired |
| US10068907B1 | Dynamic random access memory | Electricity | 6 | Active |
| USD427287S | Two-piece faucet | General | 6 | Expired |
| US8860181B2 | Thin film resistor structure | Electricity | 5 | Active |
| US9136348B2 | Semiconductor structure and fabrication method thereof | Electricity | 2 | Active |
| US10795255B2 | Method of forming layout definition of semiconductor device | Electricity | 2 | Active |
| US9299843B2 | Semiconductor structure and manufacturing method thereof | Electricity | 2 | Active |
| US9093473B2 | Method for fabricating metal-oxide semiconductor transistor | Electricity | 2 | Active |
| US10978457B2 | Semiconductor device and manufacturing method thereof | Electricity | 2 | Active |
| US9972570B2 | Semiconductor device and method for fabricating the same | Electricity | 1 | Active |
| US8569127B2 | Semiconductor device and method for fabricating the same | Electricity | 1 | Active |
| US9048246B2 | Die seal ring and method of forming the same | Electricity | 1 | Active |
| US9208276B1 | Method for generating layout pattern | Physics | 1 | Active |
| US8546962B2 | Mark structure and method for measuring alignment accuracy between former layer and latter layer | Electricity | 1 | Active |
| US9141744B2 | Method for generating layout pattern | Physics | 0 | Active |
| US8575034B2 | Fabricating method of semiconductor element | Electricity | 0 | Active |
| US11737257B2 | Semiconductor device and manufacturing method thereof | Electricity | 0 | Active |
| US9312359B2 | Semiconductor structure and fabrication method thereof | Electricity | 0 | Active |
| US8816409B2 | Metal-oxide semiconductor transistor | Electricity | 0 | Active |
| US9318490B2 | Semiconductor structure and manufacturing method thereof | Electricity | 0 | Active |
| US10475648B1 | Method for patterning a semiconductor structure | Electricity | 0 | Active |
| US10553534B2 | Method for fabricating contact electrical fuse | Electricity | 0 | Active |
| US11018006B2 | Method for patterning a semiconductor structure | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.