Wafer and method for processing a wafer
US10090214B2 · kind B2 · utility
0Cited by
3References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 15, 2012 |
| Grant date | Oct 2, 2018 |
| Priority date | — |
| Expiry date | Jun 29, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/68336
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wafer in accordance with various embodiments may include: at least one metallization structure including at least one opening; and at least one separation line region along which the wafer is to be diced, wherein the at least one separation line region intersects the at least one opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.