Method for producing a superjunction device
US10109489B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2017 |
| Grant date | Oct 23, 2018 |
| Priority date | — |
| Expiry date | Jul 13, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/157
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a method that includes forming a plurality of semiconductor arrangements one above the other. In this method, forming each of the plurality of semiconductor arrangements includes: forming a semiconductor layer; forming a plurality of trenches in a first surface of the semiconductor layer; and implanting dopant atoms of at least one of a first type and a second type into at least one of a first sidewall and a second sidewall of each of the plurality of trenches of the semiconductor layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.