Methods and apparatus for three-dimensional nonvolatile memory
US10109680B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 14, 2017 |
| Grant date | Oct 23, 2018 |
| Priority date | — |
| Expiry date | Jun 14, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/71
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method is provided that includes forming a word line above a substrate, forming a bit line above the substrate, forming a nonvolatile memory material between the word line and the bit line, the nonvolatile memory material including a semiconductor material layer and a conductive oxide material layer, forming a barrier material layer between the semiconductor material layer and the conductive oxide material layer, and forming a memory cell including the nonvolatile memory material at an intersection of the bit line and the word line. The word line is disposed in a first direction, the bit line is disposed in a second direction perpendicular to the first direction. The barrier material layer has an ionic conductivity of greater than about 0.1 Siemens/cm @ 1000° C.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.