Processing method for workpiece
US10115636B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 7, 2015 |
| Grant date | Oct 30, 2018 |
| Priority date | — |
| Expiry date | Aug 7, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3213
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A workpiece has a plurality of low-dielectric-constant insulation films and a metallic pattern stacked on a surface of a semiconductor substrate. Devices are formed in a plurality of regions partitioned by streets formed in a grid pattern. Surfaces of the devices formed on the workpiece are covered with a surface protective member, leaving the streets exposed. A dispersion of abrasive grains in an etching liquid capable of dissolving the metallic pattern is blasted against the workpiece together with compressed gas so as to remove the low-dielectric-constant insulation films and the metallic pattern on the streets, thereby exposing the semiconductor substrate. The workpiece is divided with the semiconductor substrate exposed by the wet blasting step subjected to dry etching so as to divide the workpiece along the streets.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.