Methods and apparatus for three-dimensional nonvolatile memory
US10115770B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 28, 2017 |
| Grant date | Oct 30, 2018 |
| Priority date | — |
| Expiry date | Mar 6, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8836
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is provided that includes forming a dielectric material and a first sacrificial material above a substrate, forming a second sacrificial material above the substrate and disposed adjacent the dielectric material and the first sacrificial material, forming a first hole in the second sacrificial material, the first hole disposed in a first direction, forming a word line layer above the substrate via the first hole, the word line layer disposed in a second direction perpendicular to the first direction, forming a first portion of a nonvolatile memory material on peripheral sides of the word line layer via the first hole, forming a second hole in the second sacrificial material, forming a second portion of the nonvolatile memory material on a sidewall of the second hole, forming a local bit line in the second hole, and forming a memory cell including the nonvolatile memory material at an intersection of the local bit line and the word line layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.