Vertical bipolar transistor
US10128314B2 · kind B2 · utility
3Cited by
1References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 4, 2017 |
| Grant date | Nov 13, 2018 |
| Priority date | — |
| Expiry date | Jan 4, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/137
Abstract
The disclosure relates to an integrated circuit comprising a transistor comprising first and second conduction terminals and a control terminal. The integrated circuit further comprises a stack of a first dielectric layer, a conductive layer, and a second dielectric layer, the first conduction terminal comprising a first semiconductor region formed in the first dielectric layer, the control terminal comprising a second semiconductor region formed in the conductive layer, and the second conduction terminal comprising a third semiconductor region formed in the second dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.