Patent · US Active

Via formation using sidewall image transfer process to define lateral dimension

US10157789B2 · kind B2 · utility

10Cited by
10References
11Claims
0Family size

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Key dates

Filing dateAug 17, 2016
Grant dateDec 18, 2018
Priority date
Expiry dateAug 17, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L23/53266
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method of forming a via to an underlying layer of a semiconductor device is provided. The method may include forming a pillar over the underlying layer using a sidewall image transfer process. A dielectric layer is formed over the pillar and the underlying layer; and a via mask patterned over the dielectric layer, the via mask having a mask opening at least partially overlapping the pillar. A via opening is etched in the dielectric layer using the via mask, the mask opening defining a first lateral dimension of the via opening in a first direction and the pillar defining a second lateral dimension of the via opening in a second direction different than the first direction. The via opening is filled with a conductor to form the via. A semiconductor device and via structure are also provided.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.