Yongan Xu
88Patents
9h-index
72Co-inventors
77Inventor score
Filing activity: Feb 16, 2006 → Mar 21, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10020254B1 | Integration of super via structure in BEOL | Electricity | 25 | Active |
| US9219007B2 | Double self aligned via patterning | Electricity | 24 | Active |
| US10020255B1 | Integration of super via structure in BEOL | Electricity | 18 | Active |
| US7901607B2 | Method of low temperature imprinting process with high pattern transfer yield | Emerging Cross-Sectional Technologies | 15 | Active |
| US9257334B2 | Double self-aligned via patterning | Electricity | 13 | Active |
| US9064813B2 | Trench patterning with block first sidewall image transfer | Electricity | 13 | Active |
| US10157789B2 | Via formation using sidewall image transfer process to define lateral dimension | Electricity | 10 | Active |
| US9991365B1 | Forming vertical transport field effect transistors with uniform bottom spacer thickness | Electricity | 10 | Active |
| US9984919B1 | Inverted damascene interconnect structures | Electricity | 9 | Active |
| US9490168B1 | Via formation using sidewall image transfer process to define lateral dimension | Electricity | 8 | Active |
| US10658180B1 | EUV pattern transfer with ion implantation and reduced impact of resist residue | Electricity | 5 | Active |
| US10622301B2 | Method of forming a straight via profile with precise critical dimension control | Electricity | 4 | Active |
| US10749011B2 | Area selective cyclic deposition for VFET top spacer | Electricity | 3 | Active |
| US10607922B1 | Controlling via critical dimension during fabrication of a semiconductor wafer | Electricity | 3 | Active |
| US9406746B2 | Work function metal fill for replacement gate fin field effect transistor process | Electricity | 3 | Active |
| US9837351B1 | Avoiding gate metal via shorting to source or drain contacts | Electricity | 3 | Active |
| US10672705B2 | Method of forming a straight via profile with precise critical dimension control | Electricity | 3 | Active |
| US10032632B2 | Selective gas etching for self-aligned pattern transfer | Electricity | 3 | Active |
| US11610925B2 | Imaging system and method of creating composite images | Physics | 2 | Active |
| US11699591B2 | Two-color self-aligned double patterning (SADP) to yield static random access memory (SRAM) and dense logic | Electricity | 2 | Active |
| US10032633B1 | Image transfer using EUV lithographic structure and double patterning process | Electricity | 2 | Active |
| US9330965B2 | Double self aligned via patterning | Electricity | 2 | Active |
| US8298467B2 | Method of low temperature imprinting process with high pattern transfer yield | Emerging Cross-Sectional Technologies | 1 | Active |
| US11037822B2 | Svia using a single damascene interconnect | Electricity | 1 | Active |
| US11111176B1 | Methods and apparatus of processing transparent substrates | Chemistry; Metallurgy | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.