Semiconductor package and manufacturing method thereof
US10163867B2 · kind B2 · utility
12Cited by
9References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 15, 2018 |
| Grant date | Dec 25, 2018 |
| Priority date | — |
| Expiry date | Jan 15, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises shielding on multiple sides thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.