Vertical field effect transistors with uniform threshold voltage

US10170590B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Kangguo Cheng · Schenectady, US
• Xin Miao · Guilderland, US
• Heng Wu · Guilderland, US
• Peng Xu · Guilderland, US

Key dates

• Filing date: Mar 2, 2018
• Grant date: Jan 1, 2019
• Expiry date: Mar 2, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038

Abstract

Provided is a method for forming a semiconductor structure. In one or more embodiments of the invention, the method includes forming a semiconductor fin on a substrate and decreasing a width of the semiconductor fin. The method further includes forming a spacer layer on a surface of the substrate and forming a high dielectric constant layer on exposed surfaces of the semiconductor fin and the spacer layer. The method also includes forming a work function metal layer on the high dielectric constant layer. The method also includes removing portions of the work function metal layer and the high dielectric constant layer to expose portions of the spacer layer. A thickness of the remaining work function metal layer on sidewalls of the semiconductor fin is uniform.