Quiesce handling in multithreaded environments
US10176002B2 · kind B2 · utility
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4Claims
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Key dates
| Filing date | Dec 17, 2014 |
| Grant date | Jan 8, 2019 |
| Priority date | — |
| Expiry date | Jul 30, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/5021
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatuses for performing a quiesce operation in a multithread environment is provided. A processor receives a first thread quiesce request from a first thread executing on the processor. A processor sends a first processor quiesce request to a system controller to initiate a quiesce operation. A processor performs one or more operations of the first thread based, at least in part, on receiving a response from the system controller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.