Complementary FETs with wrap around contacts and method of forming same
US10192867B1 · kind B1 · utility
82Cited by
7References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 5, 2018 |
| Grant date | Jan 29, 2019 |
| Priority date | — |
| Expiry date | Feb 5, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates generally to wrap around contact formation in source/drain regions of a semiconductor device such as an integrated circuit (IC), and more particularly, to stacked IC structures containing complementary FETs (CFETs) having wrap around contacts and methods of forming the same. Disclosed is a stacked IC structure including a first FET on a substrate, a second FET vertically stacked above the first FET, a dielectric layer above the second FET, and a spacer layer between FETs, wherein each FET has an electrically isolated wrap-around contact formed therearound.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.