Silicidation of bottom source/drain sheet using pinch-off sacrificial spacer process

US10211316B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Brent A. Anderson · Jericho, US
• Huiming Bu · Millwood, US
• Terence B. Hook · Jericho, US
• Fee Li Lie · Albany, US
• Junli Wang · Slingerlands, US

Key dates

• Filing date: Sep 27, 2017
• Grant date: Feb 19, 2019
• Expiry date: Sep 27, 2037

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/151

Abstract

A vertical fin field-effect-transistor and a method for fabricating the same. The vertical fin field-effect-transistor includes at least a substrate, a first source/drain layer, and a plurality of fins each disposed on and in contact with the first source/drain layer. Silicide regions are disposed within a portion of the first source/drain layer. A gate structure is in contact with the plurality of fins, and a second source/drain layer is disposed on the gate structure. The method includes forming silicide in a portion of a first source/drain layer. A first spacer layer is formed in contact with at least the silicide, the first source/drain layer and the plurality of fins. A gate structure is formed in contact with the plurality of fins and the first spacer layer. A second spacer layer is formed in contact with the gate structure and the plurality of fins.