Technologies for a distributed hardware queue manager

US10216668B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Ren Wang · Portland, US
• Yipeng Wang · Houston, US
• Jr-Shian Tsai · Beaverton, US
• Andrew J. Herdrich · Hillsboro, US
• Tsung-Yuan C. Tai · Portland, US
• Niall D. McDonnell · Limerick, IE
• Stephen R. Van Doren · Portland, US
• David P. Sonnier · Austin, US
• Debra Bernstein · Sudbury, US
• Hugh Wilkinson · Newton, US
• Narender Vangati · Round Rock, US
• Stephen H. Miller · Naples, US
• Gage Eads · Austin, US
• Andrew Cunningham · Nottingham, GB
• Jonathan Kenny · Tipperary, IE
• Bruce Richardson · Ottawa, CA
• William Burroughs · Macungie, US
• Joseph R. Hasting · Orefield, US
• An Yan · Sammamish, US
• James Clee · Orefield, US
• Te K. Ma · Allentown, US
• Jerry Pirog · Easton, US
• Jamison D. Whitesell · Allentown, US

Key dates

• Filing date: Mar 31, 2016
• Grant date: Feb 26, 2019
• Expiry date: Oct 29, 2036

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F2212/68
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

Technologies for a distributed hardware queue manager include a compute device having a processor. The processor includes two or more hardware queue managers as well as two or more processor cores. Each processor core can enqueue or dequeue data from the hardware queue manager. Each hardware queue manager can be configured to contain several queue data structures. In some embodiments, the queues are addressed by the processor cores using virtual queue addresses, which are translated into physical queue addresses for accessing the corresponding hardware queue manager. The virtual queues can be moved from one physical queue in one hardware queue manager to a different physical queue in a different physical queue manager without changing the virtual address of the virtual queue.