Jerry Pirog
11Patents
3h-index
28Co-inventors
52Inventor score
Filing activity: Dec 17, 2010 → Oct 14, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8537832B2 | Exception detection and thread rescheduling in a multi-core, multi-thread network processor | Physics | 6 | Active |
| US8910171B2 | Thread synchronization in a multi-thread network communications processor architecture | Electricity | 5 | Active |
| US10445271B2 | Multi-core communication acceleration using hardware queue device | Physics | 4 | Active |
| US10216668B2 | Technologies for a distributed hardware queue manager | Physics | 3 | Active |
| US8943507B2 | Packet assembly module for multi-core, multi-thread network processors | Physics | 3 | Active |
| US9444757B2 | Dynamic configuration of processing modules in a network communications processor architecture | Electricity | 2 | Active |
| US8935483B2 | Concurrent, coherent cache access for multiple threads in a multi-core, multi-thread network processor | Physics | 2 | Active |
| US8949582B2 | Changing a flow identifier of a packet in a multi-thread, multi-flow network processor | Electricity | 1 | Active |
| US10437638B2 | Method and apparatus for dynamically balancing task processing while maintaining task order | Physics | 0 | Active |
| US8874878B2 | Thread synchronization in a multi-thread, multi-flow network communications processor architecture | Electricity | 0 | Active |
| US10929323B2 | Multi-core communication acceleration using hardware queue device | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.