Three-dimensional ReRAM memory device employing replacement word lines and methods of making the same
US10224373B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2017 |
| Grant date | Mar 5, 2019 |
| Priority date | — |
| Expiry date | Jul 18, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/841
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, resistive memory elements located in the alternating stack in first and second array regions and contact via structures located in a contact region between the first and the second array regions. The contact via structures have different depths and contact different electrically conductive layers. Support pillars are located in the contact region and extending through the alternating stack. At least one conduction channel area is located between the contact via structures in the contact region. The conduction channel area contains no support pillars, and all electrically conductive layers in the conduction channel area are continuous from the first array region to the second array region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.