Split gate non-volatile flash memory cell having metal gates

US10249631B2 · kind B2 · utility

Assignee

• Silicon Storage Technology, Inc. · US

Inventors

• Chien-Sheng Su · Saratoga, US
• Feng Zhou · Ann Arbor, US
• Jeng-Wei Yang · Zhubei City, TW
• Hieu Van Tran · San Jose, US
• Nhan Do · Saratoga, US

Key dates

• Filing date: Apr 4, 2018
• Grant date: Apr 2, 2019
• Expiry date: Apr 4, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/834

Abstract

A memory device including a silicon substrate having a planar upper surface in a memory cell area and an upwardly extending silicon fin in a logic device area. The silicon fin includes side surfaces extending up and terminating at a top surface. The logic device includes spaced apart source and drain regions with a channel region extending there between (along the top surface and the side surfaces), and a conductive logic gate disposed over the top surface and laterally adjacent to the side surfaces. The memory cell includes spaced apart source and drain regions with a second channel region extending there between, a conductive floating gate disposed over one portion of the second channel region, a conductive word line gate disposed over another portion of the second channel region, a conductive control gate disposed over the floating gate, and a conductive erase gate disposed over the source region.