Nhan Do
185Patents
10h-index
76Co-inventors
83Inventor score
Filing activity: Jun 5, 1998 → Apr 24, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9887206B2 | Method of making split gate non-volatile memory cell with 3D FinFET structure | Electricity | 53 | Active |
| US9276005B1 | Non-volatile memory array with concurrently formed low and high voltage logic devices | Electricity | 28 | Active |
| US6140832A | Method of utilizing IDDQ tests to screen out defective parts | Physics | 22 | Expired |
| US10269440B2 | Flash memory array with individual memory cell read, program and erase | Physics | 17 | Active |
| US8711636B2 | Method of operating a split gate flash memory cell with coupling gate | Electricity | 17 | Active |
| US10748630B2 | High precision and highly efficient tuning mechanisms and algorithms for analog neuromorphic memory in artificial neural networks | Physics | 16 | Active |
| US8148768B2 | Non-volatile memory cell with self aligned floating and erase gates, and method of making same | Electricity | 14 | Active |
| US10720217B1 | Memory device and method for varying program state separation based upon frequency of use | Electricity | 11 | Active |
| US9634018B2 | Split gate non-volatile memory cell with 3D finFET structure, and method of making same | Electricity | 11 | Active |
| US9634019B1 | Non-volatile split gate memory cells with integrated high K metal gate, and method of making same | Electricity | 11 | Active |
| US9496369B2 | Method of forming split-gate memory cell array along with low and high voltage logic devices | Electricity | 9 | Active |
| US9972630B2 | Split gate non-volatile flash memory cell having metal gates and method of making same | Electricity | 8 | Active |
| US9985042B2 | Method of integrating FinFET CMOS devices with embedded nonvolatile memory cells | Electricity | 8 | Active |
| US9286982B2 | Flash memory system with EEPROM functionality | Physics | 7 | Active |
| US9431407B2 | Method of making embedded memory device with silicon-on-insulator substrate | Electricity | 7 | Active |
| US10418451B1 | Split-gate flash memory cell with varying insulation gate oxides, and method of forming same | Electricity | 7 | Active |
| US9293204B2 | Non-volatile memory cell with self aligned floating and erase gates, and method of making same | Electricity | 7 | Active |
| US8785307B2 | Method of forming a memory cell by reducing diffusion of dopants under a gate | Electricity | 6 | Active |
| US10937794B2 | Split gate non-volatile memory cells with FinFET structure and HKMG memory and logic gates, and method of making same | Electricity | 6 | Active |
| US9245638B2 | Method of operating a split gate flash memory cell with coupling gate | Electricity | 6 | Active |
| US9721958B2 | Method of forming self-aligned split-gate memory cell array with metal gates and logic devices | Electricity | 5 | Active |
| US11409352B2 | Power management for an analog neural memory in a deep learning artificial neural network | Physics | 5 | Active |
| US11270771B2 | Neural network classifier using array of stacked gate non-volatile memory cells | Electricity | 5 | Active |
| US9570592B2 | Method of forming split gate memory cells with 5 volt logic devices | Electricity | 5 | Active |
| US10312247B1 | Two transistor FinFET-based split gate non-volatile floating gate flash memory and method of fabrication | Electricity | 5 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.