Methods of forming semiconductor structures including multi-portion liners
US10249819B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 3, 2014 |
| Grant date | Apr 2, 2019 |
| Priority date | — |
| Expiry date | Apr 3, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76834
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor structure. The method comprises forming a protective portion of a liner on at least a portion of stack structures on a substrate. The protective portion comprises a material formulated to adhere to the stack structures. A conformal portion of the liner is formed on the protective portion of the liner or on the protective portion of the liner and exposed materials of the stack structures. At least one of the protective portion and the conformal portion does not comprise aluminum. Additional methods of forming a semiconductor structure are disclosed, as are semiconductor structures including the liners comprising the protective portion and the conformal portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.