Insulated epitaxial structures in nanosheet complementary field effect transistors
US10256158B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 22, 2017 |
| Grant date | Apr 9, 2019 |
| Priority date | — |
| Expiry date | Nov 22, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/01
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
Integrated circuit structures include isolation elements extending into a substrate, and source/drain regions of a first transistor contacting the isolation elements. The isolation elements extend from the substrate to the source/drain regions of the first transistor. Isolation layers contact the source/drain regions of the first transistor, and source/drain regions of a second transistor also contact the isolation layers. Thus, the isolation layers are between the source/drain regions of the first transistor and the source/drain regions of the second transistor. Channel regions of the first transistor contact and extend between the source/drain regions of the first transistor, and channel regions of the second transistor contact and extend between the source/drain regions of the second transistor. A gate conductor surrounds sides of the channel region of the first transistor and the channel region of the second transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.