Memory management
US10261876B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2016 |
| Grant date | Apr 16, 2019 |
| Priority date | — |
| Expiry date | Feb 18, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0688
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure includes apparatuses and methods related to hybrid memory management. An example apparatus can include a first memory array, a number of second memory arrays, and a controller coupled to the first memory array and the number of second memory arrays configured to execute a write operation, wherein execution of the write operation writes data to the first memory array starting at a location indicated by a write cursor, and place the write cursor at an updated location in the first memory array upon completing execution of the write operation, wherein the updated location is a next available location in the first memory array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.