Composite isolation structures for a fin-type field effect transistor
US10297597B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2017 |
| Grant date | May 21, 2019 |
| Priority date | — |
| Expiry date | Aug 29, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31053
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Structures for the isolation of a fin-type field-effect transistor and methods of forming isolation for a fin-type field-effect transistor. A first dielectric layer is formed that encapsulates a plurality of fins. A second dielectric layer is formed that surrounds the first dielectric layer and the plurality of fins. A surface of the second dielectric layer relative to a surface of the first dielectric layer. A liner is conformally deposited on the surface of the first dielectric layer and on the recessed surface of the second dielectric layer. A section of the liner is removed to expose the surface of the first dielectric layer. The exposed surface of the first dielectric layer is recessed to reveal a portion of each of the plurality of fins.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.