Patent · US Active

Load lock interface and integrated post-processing module

US10304707B2 · kind B2 · utility

0Cited by
7References
7Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 20, 2015
Grant dateMay 28, 2019
Priority date
Expiry dateMar 11, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/67766
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A load lock assembly includes a first load lock connected between an equipment front end module (EFEM) and a wafer transport module, the EFEM being at a lab ambient condition, the wafer transport module being at a vacuum condition, the wafer transport module being part of a wafer transport assembly that is configured to transport wafers to and from one or more process modules that are connected to the wafer transport assembly; a second load lock disposed over the first load lock, the second load lock connected between the EFEM and the wafer transport module; a post-processing module disposed over the second load lock, the post-processing module configured for performing a post-processing operation on a processed wafer that has been processed in at least one of the process modules that are connected to the wafer transport assembly, the post-processing module being configured for connection to the wafer transport module.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.