Selective deposition and nitridization of bottom electrode metal for MRAM applications
US10312434B2 · kind B2 · utility
3Cited by
10References
14Claims
0Family size
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Key dates
| Filing date | Nov 7, 2017 |
| Grant date | Jun 4, 2019 |
| Priority date | — |
| Expiry date | Nov 7, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/10
Abstract
A method is presented for forming a semiconductor structure. The method includes depositing an insulating layer over a semiconductor substrate, etching the insulating layer to form trenches for receiving a metal, depositing one or more sacrificial layers, and etching portions of the one or more sacrificial layers to expose a top surface of the metal of one or more of the trenches. The method further includes selectively depositing an electrode over the top surface of the exposed metal and nitridizing the electrode to form a diffusion barrier between chip components and the metal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.