Inventor · Albany, NY, US

Joe Lee

35Patents
7h-index
32Co-inventors
61Inventor score

Filing activity: Nov 13, 2014 → Oct 19, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US9349687B1 Advanced manganese/manganese nitride cap/etch mask for air gap formation scheme in nanocopper low-K interconnect Electricity 74 Active
US10020254B1 Integration of super via structure in BEOL Electricity 25 Active
US9953865B1 Structure and method to improve FAV RIE process margin and electromigration Electricity 20 Active
US10020255B1 Integration of super via structure in BEOL Electricity 18 Active
US9385078B1 Self aligned via in integrated circuit Electricity 11 Active
US9390967B2 Method for residue-free block pattern transfer onto metal interconnects for air gap formation Electricity 8 Active
US9373582B1 Self aligned via in integrated circuit Electricity 7 Active
US10622301B2 Method of forming a straight via profile with precise critical dimension control Electricity 4 Active
US10312434B2 Selective deposition and nitridization of bottom electrode metal for MRAM applications Electricity 3 Active
US10347825B2 Selective deposition and nitridization of bottom electrode metal for MRAM applications Electricity 3 Active
US10672705B2 Method of forming a straight via profile with precise critical dimension control Electricity 3 Active
US11710658B2 Structure and method to improve FAV RIE process margin and Electromigration Electricity 1 Active
US9905513B1 Selective blocking boundary placement for circuit locations requiring electromigration short-length Electricity 1 Active
US11837501B2 Selective recessing to form a fully aligned via Electricity 1 Active
US9252051B1 Method for top oxide rounding with protection of patterned features Electricity 1 Active
US9768113B2 Self aligned via in integrated circuit Electricity 1 Active
US10957584B2 Structure and method to improve FAV RIE process margin and electromigration Electricity 1 Active
US10276436B2 Selective recessing to form a fully aligned via Electricity 1 Active
US11037822B2 Svia using a single damascene interconnect Electricity 1 Active
US10121676B2 Interconnects fabricated by hydrofluorocarbon gas-assisted plasma etch Electricity 1 Active
US10049974B2 Metal silicate spacers for fully aligned vias Electricity 1 Active
US10985056B2 Structure and method to improve FAV RIE process margin and Electromigration Electricity 1 Active
US10832952B2 Selective recessing to form a fully aligned via Electricity 0 Active
US10170416B2 Selective blocking boundary placement for circuit locations requiring electromigration short-length Electricity 0 Active
US11164815B2 Bottom barrier free interconnects without voids Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.