Compact device structures for a bipolar junction transistor

US10367083B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Vibhor Jain · Williston, US
• Renata Camillo-Castillo · South Burlington, US
• Qizhi Liu · South Burlington, US
• John J. Pekarik · Underhill, US
• Alvin J. Joseph · Williston, US
• Peter B. Gray · Jericho, US

Key dates

• Filing date: Mar 25, 2016
• Grant date: Jul 30, 2019
• Expiry date: May 24, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/231
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Device structures for a bipolar junction transistor and methods for fabricating a device structure using a substrate. One or more primary trench isolation regions are formed that surround an active device region of the substrate and a collector contact region of the substrate. A base layer is formed on the active device region and the collector contact region, and the active device region includes a collector. Each primary trench isolation region extends vertically to a first depth into the substrate. A trench is formed laterally located between the base layer and the collector contact region and that extends vertically through the base layer and into the substrate to a second depth that is less than the first depth. A dielectric is formed in the trench to form a secondary trench isolation region. An emitter is formed on the base layer.