Method of protecting electronic circuit against eavesdropping by power analysis and electronic circuit using the same
US10374791B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 4, 2016 |
| Grant date | Aug 6, 2019 |
| Priority date | — |
| Expiry date | Feb 5, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/08
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An electronic circuit with protection against eavesdropping by power analysis is provided. The electronic circuit includes: a storage element for storing a set of bits; a logic unit for processing the stored set of bits and providing a next state set of bits after two or more cycles, wherein in a first cycle, some of the stored set of bits are provided to the logic unit correctly and some are replaced by random values and in a last cycle, all of the stored set of bits are provided to the logic unit correctly; and a random bit generator that generates a random bit for each bit of the stored set of bits to determine which bits of the stored set of bits are to be provided correctly and which bits are to be replaced in each cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.