Nir Tasher
30Patents
3h-index
26Co-inventors
59Inventor score
Filing activity: Mar 28, 2007 → Jan 29, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7797115B2 | Time interval measurement for capacitive detection | Physics | 33 | Active |
| US7945399B2 | Capacitive detection systems, modules and methods | Physics | 32 | Active |
| US9343162B2 | Protection against side-channel attacks on non-volatile memory | Physics | 7 | Active |
| US9819657B2 | Protection of memory interface | Electricity | 3 | Active |
| US8330743B2 | Power efficient capacitive detection | Physics | 3 | Active |
| US10754988B2 | Anti-rollback version upgrade in secured memory chip | Electricity | 3 | Active |
| US9523722B2 | Method and apparatus for supply voltage glitch detection in a monolithic integrated circuit device | Physics | 3 | Active |
| US10482036B2 | Securely binding between memory chip and host | Physics | 2 | Active |
| US10757087B2 | Secure client authentication based on conditional provisioning of code signature | Electricity | 2 | Active |
| US8285895B2 | Handshake free sharing in a computer architecture | Physics | 2 | Active |
| US9318221B2 | Memory device with secure test mode | Physics | 2 | Active |
| US7884678B2 | Single-pin RC oscillator | Electricity | 1 | Active |
| US10374791B2 | Method of protecting electronic circuit against eavesdropping by power analysis and electronic circuit using the same | Electricity | 1 | Active |
| US8688944B2 | Memory sharing between embedded controller and central processing unit chipset | Emerging Cross-Sectional Technologies | 1 | Active |
| US8169419B2 | Power efficient capacitive detection | Physics | 1 | Active |
| US8886955B2 | Systems and methods for BIOS processing | Physics | 1 | Active |
| US9455962B2 | Protecting memory interface | Electricity | 1 | Active |
| US9641491B2 | Secure memory interface with cumulative authentication | Electricity | 1 | Active |
| US9471413B2 | Memory device with secure test mode | Physics | 0 | Active |
| US11907559B1 | Physically secure memory partitioning | Physics | 0 | Active |
| US9626529B2 | Secure data storage device and data writing and read methods thereof | Physics | 0 | Active |
| US9448880B2 | Storage device with robust error correction scheme | Physics | 0 | Active |
| US8006004B2 | Non-intrusive debug port interface | Physics | 0 | Active |
| US9223960B1 | State-machine clock tampering detection | Physics | 0 | Active |
| US9397663B2 | Fault protection for high-fanout signal distribution circuitry | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.