Semiconductor wafer thinning systems and related methods
US10388526B1 · kind B1 · utility
8Cited by
6References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Apr 20, 2018 |
| Grant date | Aug 20, 2019 |
| Priority date | — |
| Expiry date | Apr 20, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8325
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor substrate thinning systems and methods. Implementations of a method of thinning a semiconductor substrate may include: providing a semiconductor substrate having a first surface and a second surface opposing the first surface and inducing damage into a portion of the semiconductor substrate adjacent to the second surface forming a damage layer. The method may also include backgrinding the second surface of the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.