Edge cut debond using a temporary filler material with no adhesive properties and edge cut debond using an engineered carrier to enable topography
US10403618B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 21, 2017 |
| Grant date | Sep 3, 2019 |
| Priority date | — |
| Expiry date | Sep 21, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/94
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device assembly that includes a first side of a semiconductor device supported on a substrate to permit the processing of a second side of the semiconductor device. A filler material deposited on the semiconductor device supports the semiconductor device on the substrate. The filler material does not adhere to the semiconductor device or the substrate. Alternatively, the filler material may be deposited on the substrate. Instead of a filler material, the substrate may include a topography configured to support the semiconductor device. Adhesive applied between an outer edge of the first side of the semiconductor and the substrate bonds the outer edge of the semiconductor device to the substrate to form a semiconductor device assembly. A second side of the semiconductor device may then be processed and the outer edge of the semiconductor device may be cut off to release the semiconductor device from the assembly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.