Jonathan S. Hacker
23Patents
3h-index
15Co-inventors
56Inventor score
Filing activity: Oct 8, 2008 → Dec 12, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9905527B1 | Uniform electrochemical plating of metal onto arrays of pillars having different lateral densities and related technology | Electricity | 14 | Active |
| US9865578B2 | Methods of manufacturing multi-die semiconductor device packages and related assemblies | Electricity | 3 | Active |
| US10396052B2 | Uniform electrochemical plating of metal onto arrays of pillars having different lateral densities and related technology | Electricity | 3 | Active |
| US10002840B1 | Semiconductor devices having discretely located passivation material, and associated systems and methods | Electricity | 2 | Active |
| US7798674B2 | Cover device for compact flourescent lamps | Emerging Cross-Sectional Technologies | 2 | Active |
| US10763131B2 | Semiconductor device with a multi-layered encapsulant and associated systems, devices, and methods | Electricity | 2 | Active |
| US10622223B2 | Semiconductor device with a multi-layered encapsulant and associated systems, devices, and methods | Electricity | 2 | Active |
| US11527505B2 | Uniform electrochemical plating of metal onto arrays of pillars having different lateral densities and related technology | Electricity | 1 | Active |
| US11923329B2 | Uniform electrochemical plating of metal onto arrays of pillars having different lateral densities and related technology | Electricity | 1 | Active |
| US10103134B2 | Methods of manufacturing multi-die semiconductor device packages and related assemblies | Electricity | 1 | Active |
| US11004697B2 | Semiconductor device with a multi-layered encapsulant and associated systems, devices, and methods | Electricity | 1 | Active |
| US10446431B2 | Temporary carrier debond initiation, and associated systems and methods | Emerging Cross-Sectional Technologies | 0 | Active |
| US10852344B2 | Inductive testing probe apparatus for testing semiconductor die and related systems and methods | Electricity | 0 | Active |
| US10748857B2 | Die features for self-alignment during die bonding | Electricity | 0 | Active |
| US11094684B2 | Edge cut debond using a temporary filler material with no adhesive properties and edge cut debond using an engineered carrier to enable topography | Electricity | 0 | Active |
| US10403618B2 | Edge cut debond using a temporary filler material with no adhesive properties and edge cut debond using an engineered carrier to enable topography | Electricity | 0 | Active |
| US11402426B2 | Inductive testing probe apparatus for testing semiconductor die and related systems and methods | Electricity | 0 | Active |
| US11565371B2 | Systems and methods for forming semiconductor cutting/trimming blades | Performing Operations; Transporting | 0 | Active |
| US10262961B2 | Semiconductor devices having discretely located passivation material, and associated systems and methods | Electricity | 0 | Active |
| US10896886B2 | Semiconductor devices having discretely located passivation material, and associated systems and methods | Electricity | 0 | Active |
| US11955346B2 | Semiconductor device with a multi-layered encapsulant and associated systems, devices, and methods | Electricity | 0 | Active |
| US11302653B2 | Die features for self-alignment during die bonding | Electricity | 0 | Active |
| US10847486B2 | Uniform electrochemical plating of metal onto arrays of pillars having different lateral densities and related technology | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.