Inventor · Caldwell, ID, US

Christopher J. Gambee

24Patents
3h-index
24Co-inventors
59Inventor score

Filing activity: May 5, 2005 → Aug 14, 2020

Most-cited inventions

PatentTitleAreaCited byStatus
US9299663B2 Semiconductor devices and methods for backside photo alignment Electricity 9 Active
US8659153B2 Pillar on pad interconnect structures, semiconductor dice and die assemblies including such interconnect structures, and related methods Electricity 6 Active
US10332792B1 Methods of fabricating conductive traces and resulting structures Electricity 4 Active
US9318438B2 Semiconductor structures comprising at least one through-substrate via filled with conductive materials Electricity 3 Active
US9704781B2 Under-bump metal structures for interconnecting semiconductor dies or packages and associated systems and methods Electricity 3 Active
US7402908B2 Intermediate semiconductor device structures Electricity 3 Expired
US8470710B2 Methods of forming a metal pattern Electricity 2 Active
US10002840B1 Semiconductor devices having discretely located passivation material, and associated systems and methods Electricity 2 Active
US8008196B2 Method to create a metal pattern using a damascene-like process Electricity 2 Active
US9741612B2 Semiconductor devices and methods for backside photo alignment Electricity 1 Active
US8329580B2 Methods of forming a metal pattern and semiconductor device structure Electricity 1 Active
US9129869B2 Pillar on pad interconnect structures, semiconductor devices including same and related methods Electricity 1 Active
US9034769B2 Methods of selectively removing a substrate material Electricity 1 Active
US10896886B2 Semiconductor devices having discretely located passivation material, and associated systems and methods Electricity 0 Active
US9966347B2 Under-bump metal structures for interconnecting semiconductor dies or packages and associated systems and methods Electricity 0 Active
US11094684B2 Edge cut debond using a temporary filler material with no adhesive properties and edge cut debond using an engineered carrier to enable topography Electricity 0 Active
US10403618B2 Edge cut debond using a temporary filler material with no adhesive properties and edge cut debond using an engineered carrier to enable topography Electricity 0 Active
US10748857B2 Die features for self-alignment during die bonding Electricity 0 Active
US10811313B2 Methods of fabricating conductive traces and resulting structures Electricity 0 Active
US11302653B2 Die features for self-alignment during die bonding Electricity 0 Active
US11276658B2 Devices with three-dimensional structures and support elements to increase adhesion to substrates Electricity 0 Active
US10923478B2 Reduction of roughness on a sidewall of an opening Electricity 0 Active
US10262961B2 Semiconductor devices having discretely located passivation material, and associated systems and methods Electricity 0 Active
US10790251B2 Methods for enhancing adhesion of three-dimensional structures to substrates Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.