Methods for on-die memory termination and memory devices and systems employing the same
US10424356B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2018 |
| Grant date | Sep 24, 2019 |
| Priority date | — |
| Expiry date | Jul 27, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, systems, and apparatuses related to memory operation with on-die termination (ODT) are provided. A memory device may be configured to provide ODT at a first portion (e.g., rank) during multiple communications at a second portion (e.g., rank). For example, a memory device may receive a first command instructing a first portion to perform a first communication and instructing a second portion to enter an ODT mode. The device may perform, with the first portion, the first communication with a host while the second portion is in the ODT mode. The device may receive a second command instructing the first portion to perform a second communication, and the device may perform, with the first portion, the second communication while the second portion remains in the ODT mode. The second portion may persist in the ODT mode for an indicated number of communications, or until instructed to exit the ODT mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.