Methods for forming silicon-containing epitaxial layers and related semiconductor device structures

US10446393B2 · kind B2 · utility

Assignee

• ASM IP Holding B.V. · NL

Inventors

• Nupur Bhargava · Phoenix, US
• John Tolle · Gilbert, US
• Joe Margetis · Gilbert, US
• Matthew G. Goodman · Chandler, US
• Robert Vyne · Chandler, US

Key dates

• Filing date: Apr 19, 2018
• Grant date: Oct 15, 2019
• Expiry date: Apr 19, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/751
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method for forming a silicon-containing epitaxial layer is disclosed. The method may include, heating a substrate to a temperature of less than approximately 950° C. and exposing the substrate to a first silicon source comprising a hydrogenated silicon source, a second silicon source, a dopant source, and a halogen source. The method may also include depositing a silicon-containing epitaxial layer wherein the dopant concentration within the silicon-containing epitaxial layer is greater than 3×1021 atoms per cubic centimeter.