Inventor · Gilbert, AZ, US

Joe Margetis

18Patents
4h-index
18Co-inventors
49Inventor score

Filing activity: Aug 14, 2015 → Jun 14, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US9647114B2 Methods of forming highly p-type doped germanium tin films and structures and devices including the films Electricity 462 Active
US9905420B2 Methods of forming silicon germanium tin films and structures and devices including the films Electricity 449 Active
US9892913B2 Radial and thickness control via biased multi-port injection settings Electricity 448 Active
US10262859B2 Process for forming a film on a substrate using multi-port injection assemblies Electricity 396 Active
US11168395B2 Temperature-controlled flange and reactor system including same Chemistry; Metallurgy 3 Active
US10446393B2 Methods for forming silicon-containing epitaxial layers and related semiconductor device structures Electricity 3 Active
US10612136B2 Temperature-controlled flange and reactor system including same Chemistry; Metallurgy 3 Active
US10541333B2 Method for depositing a group IV semiconductor and related semiconductor device structures Electricity 1 Active
US11374112B2 Method for depositing a group IV semiconductor and related semiconductor device structures Electricity 1 Active
US11018002B2 Method for selectively depositing a Group IV semiconductor and related semiconductor device structures Electricity 0 Active
US12406846B2 Method for depositing boron and gallium containing silicon germanium layers Electricity 0 Active
US12057314B2 Methods for silicon germanium uniformity control using multiple precursors Electricity 0 Active
US11557474B2 Methods for selective deposition utilizing n-type dopants and/or alternative dopants to achieve high dopant incorporation Electricity 0 Active
US10685834B2 Methods for forming a silicon germanium tin layer and related semiconductor device structures Emerging Cross-Sectional Technologies 0 Active
US10388509B2 Formation of epitaxial layers via dislocation filtering Electricity 0 Active
US11996289B2 Methods of forming structures including silicon germanium and silicon layers, devices formed using the methods, and systems for performing the methods Electricity 0 Active
US11004977B2 Method for depositing a group IV semiconductor and related semiconductor device structures Electricity 0 Active
US12363960B2 Method for depositing a Group IV semiconductor and related semiconductor device structures Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.