ReRAM structure formed by a single process
US10446746B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 1, 2018 |
| Grant date | Oct 15, 2019 |
| Priority date | — |
| Expiry date | May 17, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8833
Abstract
A method of forming a resistive random access memory device which contains uniform layer composition is provided. The method enables the in-situ deposition of a bottom electrode layer (i.e., a metal layer), a resistive switching element (i.e., at least one metal oxide layer), and a top electrode layer (i.e., a metal nitride layer and/or a metal layer) with compositional control. Resistive random access memory devices which contain uniform layer composition enabled by the in-situ deposition of the bottom electrode layer, the resistive switching element, and the top electrode layer provide significant benefits for advanced memory technologies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.