Patent · US Active

Primitive level preemption using discrete non-real-time and real time pipelines

US10453243B2 · kind B2 · utility

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20Claims
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Key dates

Filing dateJan 3, 2019
Grant dateOct 22, 2019
Priority date
Expiry dateJan 3, 2039

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06T15/80
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Processing of non-real-time and real-time workloads is performed using discrete pipelines. A first pipeline includes a first shader and one or more fixed function hardware blocks. A second pipeline includes a second shader that is configured to emulate the at least one fixed function hardware block. First and second memory elements store first state information for the first pipeline and second state information for the second pipeline, respectively. A non-real-time workload executing in the first pipeline is preempted at a primitive boundary in response to a real-time workload being dispatched for execution in the second pipeline. The first memory element retains the first state information in response to preemption of the non-real-time workload. The first pipeline is configured to resume processing the subsequent primitive on the basis of the first state information stored in the first memory element.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.