Combined world-space pipeline shader stages
US10460513B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2016 |
| Grant date | Oct 29, 2019 |
| Priority date | — |
| Expiry date | Apr 5, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T15/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Improvements to graphics processing pipelines are disclosed. More specifically, the vertex shader stage, which performs vertex transformations, and the hull or geometry shader stages, are combined. If tessellation is disabled and geometry shading is enabled, then the graphics processing pipeline includes a combined vertex and graphics shader stage. If tessellation is enabled, then the graphics processing pipeline includes a combined vertex and hull shader stage. If tessellation and geometry shading are both disabled, then the graphics processing pipeline does not use a combined shader stage. The combined shader stages improve efficiency by reducing the number of executing instances of shader programs and associated resources reserved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.