Patent · US Active

Method of in situ hard mask removal

US10490404B2 · kind B2 · utility

0Cited by

4References

17Claims

0Family size

Assignee

TOKYO ELECTRON LIMITED · JP

Inventors

Christopher Talone · Albany, US
Andrew Nolan · Albany, US
Mingmei Wang · Albany, US
Alok Ranjan · Austin, US

Key dates

Filing date	Sep 19, 2017
Grant date	Nov 26, 2019
Priority date	—
Expiry date	Dec 13, 2037

Classification

Technology area (CPC H)Electricity
CPC primaryH01L22/26
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Systems and methods for in situ hard mask removal are described. In an embodiment, a method includes receiving a semiconductor workpiece comprising a substrate, an intermediary layer, a hard mask layer, and a photoresist layer in an etch chamber. The method may also include etching the hard mask layer to open a region left exposed by the photoresist layer. Additionally, such an embodiment may include etching the intermediary layer in a region left exposed by the hard mask layer. The method may also include removing the hard mask layer. In such embodiments, etching the hard mask layer, etching the intermediary layer, and removing the hard mask layer are performed in the etch chamber, and without the wafer being removed from the etch chamber.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.