Structure and method to improve overlay performance in semiconductor devices

US10504851B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Cung D. Tran · Newburgh, US
• Huaxiang Li · Lenox, US
• Bradley Morgenfeld · Greenfield Center, US
• Xintuo Dai · Rexford, US
• Sanggil Bae · Clifton Park, US
• Rui Chen · Jiexi, CN
• Md Motasim Bellah · Malta, US
• Dongyue Yang · Lawrenceville, US
• Minghao Tang · Ballston Lake, US
• Christian J. Ayala · Schenectady, US
• Ravi Prakash Srivastava · Clifton Park, US
• Kripa Nidhan Chauhan · Clifton Park, US
• Pavan Kumar Chinthamanipeta Sripadarao · Clifton Park, US

Key dates

• Filing date: Feb 26, 2018
• Grant date: Dec 10, 2019
• Expiry date: Feb 26, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2223/54426
• WIPO field: Optics
• WIPO sector: Instruments

Abstract

In an exemplary method, a first layer is formed on a substrate. First overlay marks are formed in a first zone of the first layer. A non-transparent layer is formed on top of the first layer. At least a portion of the non-transparent layer is removed from an area above the first zone of the first layer. This provides optical access to the first overlay marks. A second layer is formed on top of the non-transparent layer. Second overlay marks are formed in a second zone of the second layer. Position information is obtained from each of the first overlay marks and the second overlay marks.