Configuration of multi-die modules with through-silicon vias

US10509752B2 · kind B2 · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Russell Schreiber · Austin, US
• John Wuu · Fort Collins, US
• Michael Kevin Ciraula · Round Rock, US
• Patrick J. Shyvers · Fort Collins, US

Key dates

• Filing date: Apr 27, 2018
• Grant date: Dec 17, 2019
• Expiry date: Apr 27, 2038

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y02D10/00
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A data processing system includes a processing unit that forms a base die and has a group of through-silicon vias (TSVs), and is connected to a memory system. The memory system includes a die stack that includes a first die and a second die. The first die has a first surface that includes a group of micro-bump landing pads and a group of TSV landing pads. The group of micro-bump landing pads are connected to the group of TSVs of the processing unit using a corresponding group of micro-bumps. The first die has a group of memory die TSVs. The subsequent die has a first surface that includes a group of micro-bump landing pads and a group of TSV landing pads connected to the group of TSVs of the first die. The first die communicates with the processing unit using first cycle timing, and with the subsequent die using second cycle timing.