Systems and methods for improved semiconductor etching and component protection
US10522371B2 · kind B2 · utility
1Cited by
930References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 19, 2016 |
| Grant date | Dec 31, 2019 |
| Priority date | — |
| Expiry date | Nov 24, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/334
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Semiconductor systems and methods may include a semiconductor processing chamber having a gas box defining an access to the semiconductor processing chamber. The chamber may include a spacer characterized by a first surface with which the gas box is coupled, and the spacer may define a recessed ledge on an interior portion of the first surface. The chamber may include a support bracket seated on the recessed ledge that extends along a second surface of the spacer. The chamber may also include a gas distribution plate seated on the support bracket.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.